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Researching Bloom Filter for CXL Migration

Project Type

Research

Date

May 2024

Skills

-Intel Pin for memory trace data collection
-Data analysis
-Report generation

This project explored how to make CXL.mem tiered memory behave more like fast DRAM by intelligently deciding when to migrate pages from slower CXL memory without relying on CPU-heavy OS techniques like page-table scanning or hinting page faults. I worked with a diverse team to develop a counting Bloom filter (CBF)–based migration policy to identify “hot” remote pages using compact, hardware-friendly approximate frequency tracking, paired with a standard LRU eviction policy to move pages back to CXL when DRAM is full.

To handle the natural saturation problem of counting Bloom filters, we implemented a dual leader/follower CBF that periodically swaps and resets filters while continuously tracking access history. The full policy was implemented in a trace-driven simulator and tested first on synthetic locality-controlled traces, then on large Intel PIN–collected server-style traces (e.g., GCC/SQLite compilation, a 1B-element sort, and multiple SPEC CPU 2017 workloads).

Results showed that Bloom filters can be a solid migration strategy and that migration policy choices have a much larger impact on bus activity/cost than swapping eviction policies (even compared to Belady’s oracle in small-trace experiments). However, on many real benchmark traces, a surprisingly simple “migrate on access” + LRU approach matched or beat the Bloom filter, suggesting that under the assumed costs aggressive cache-like migration can be competitive for workloads with weaker locality. Overall, the work demonstrates both a practical, controller-implementable hot-page detector and a clear takeaway that the right migration trigger dominates CXL efficiency, and workload locality strongly determines whether “smart” detection outperforms simpler heuristics.

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